Title :
STAMP: A Universal Algorithmic Model for Next-Generation Multithreaded Machines and Systems
Author :
Dubois, Michel ; Lee, Hyunyoung ; Lin, Lan
Author_Institution :
Dept. of Electr. Eng.-Electrophys., Univ. of Southern California, Los Angeles, CA
Abstract :
We propose a generic algorithmic model called STAMP(synchronous, transactional, and asynchronous multi-processing) as a universal performance and power complexity model for multithreaded algorithms and systems. We provide examples to illustrate how to design and analyze algorithms using STAMP and how to apply the complexity estimates to better utilize CMP(chip multiprocessor)-based machines within given constraints such as power.
Keywords :
microprocessor chips; multi-threading; multiprocessing systems; STAMP; chip multiprocessor; generic algorithmic model; multithreaded machine; power complexity model; universal algorithmic model; Algorithm design and analysis; CMOS process; CMOS technology; Clocks; Frequency; Parallel algorithms; Parallel processing; Power system modeling; USA Councils; Yarn;
Conference_Titel :
Parallel and Distributed Processing Symposium, 2007. IPDPS 2007. IEEE International
Conference_Location :
Long Beach, CA
Print_ISBN :
1-4244-0910-1
Electronic_ISBN :
1-4244-0910-1
DOI :
10.1109/IPDPS.2007.370684
