DocumentCode
2793909
Title
Integrated design environment for DC/DC converter FET optimization
Author
Sodhi, Ranjana ; Kinzer, Dan
Author_Institution
Int. Rectifier Corp., El Segundo, CA
fYear
1999
fDate
1999
Firstpage
241
Lastpage
244
Abstract
This paper presents a new integrated design environment for device optimization for DC/DC converter applications. The tool, developed for a synchronous buck converter, combines a physical device model with a power loss model and uses the results to evaluate optimum die specifications. This integrated environment has been used for several different applications and has led to significant improvements in the final in-circuit efficiency
Keywords
DC-DC power convertors; circuit CAD; circuit optimisation; power MOSFET; semiconductor device models; software tools; DC/DC converter FET optimization; DC/DC converter applications; device optimization; final in-circuit efficiency; integrated design environment; integrated environment; optimum die specifications; physical device model; power MOSFET; power loss model; synchronous buck converter; Buck converters; Capacitance; DC-DC power converters; Design optimization; FETs; Flowcharts; MOSFETs; Packaging; Parametric statistics; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Semiconductor Devices and ICs, 1999. ISPSD '99. Proceedings., The 11th International Symposium on
Conference_Location
Toronto, Ont.
ISSN
1063-6854
Print_ISBN
0-7803-5290-4
Type
conf
DOI
10.1109/ISPSD.1999.764108
Filename
764108
Link To Document