Design and Implementation of a Reconfigurable, Embedded Real-Time Face Detection System

Author

Mariatos, V. ; Adaos, K.D. ; Alexiou, G.P.

fYear

2007

fDate

28-30 May 2007

Firstpage

65

Lastpage

68

Abstract

This paper presents the design and implementation of a real time face detection system on an embedded reconfigurable platform. Our approach to face detection is based on a skin-segmentation algorithm followed by feature extraction and face verification. Our implementation is done on DMV, a reconfigurable platform with novel features targeting real time computer vision applications. DMV is a system on chip based on the combination of a high performance 32-bit SPARC-compliant processor with data-flow processing blocks.

Keywords

computer vision; digital signal processing chips; embedded systems; face recognition; feature extraction; image segmentation; reconfigurable architectures; system-on-chip; DMV architecture; data-flow processing block; face verification; feature extraction; high-performance 32-bit SPARC-compliant processor; real-time computer vision application; reconfigurable embedded real-time face detection system design; skin-segmentation algorithm; system-on-chip; Computer architecture; Computer vision; Face detection; Face recognition; Field programmable gate arrays; Hardware; Image processing; Machine vision; Real time systems; System-on-a-chip;

fLanguage

English

Publisher

ieee

Conference_Titel

Rapid System Prototyping, 2007. RSP 2007. 18th IEEE/IFIP International Workshop on

Conference_Location

Porto Alegre

ISSN

1074-6005

Print_ISBN

0-7695-2834-1

Type

conf

DOI

10.1109/RSP.2007.19

Filename

4228487