Author_Institution :
Univ. of Southern California, Los Angeles, CA, USA
Abstract :
As feature sizes continue to decrease and clock rates and device count on a VLSI chip increase, it becomes increasingly more difficult to maintain yields at their present levels. Process variation, noise and spot defects create very costly problems for our industry. Luckily, in the domain of multi-media, there exists a large body of functions where computational results need not always be correct. We show that for many VLSI implementations of signal processing algorithms, such as MPEG and JPEG encoders, a significant proportion of chips having low levels of defects provide erroneous but acceptable results. We introduce the concept of error-tolerance, and mention related issues needed to support this concept, including ways for specifying performance, design techniques that consider yield, test techniques for quantifying erroneous behavior, and finally the issue of marketing. The motivation for this work is to significantly increase the effective yield of a process, encourage the implementation of complex data processing chips, and drastically reduce chip costs.
Keywords :
VLSI; digital signal processing chips; fault tolerance; integrated circuit reliability; multimedia systems; JPEG encoders; MPEG encoders; VLSI chip; error-tolerance; imprecise computation; multimedia applications; signal processing algorithms; Circuit faults; Circuit testing; Clocks; Computer applications; Costs; Data processing; Digital systems; Manufacturing; Signal processing algorithms; Very large scale integration;