A processor for testing mixed-signal cores in system-on-chip

This paper describes the design of a processor specific for testing cores embedded in system-on-chip. This processor, which can be implemented within a system´s reconfigurable area, shall be responsible for scheduling and control test operations and perform preliminary data processing, as well as to provide the interface with an external tester. Building these test operations on-chip allows for simplifying external tester interface and to reduce testing time. The testing procedure and the infrastructure required to test an A/D converter is described as an example.