DocumentCode :
2796049
Title :
SystemC-based design methodology for reconfigurable system-on-chip
Author :
Qu, Yang ; Tiensyrjä, Kari ; Soininen, Juha-Pekka
Author_Institution :
VTT Electron., Oulu, Finland
fYear :
2005
fDate :
30 Aug.-3 Sept. 2005
Firstpage :
364
Lastpage :
371
Abstract :
Reconfigurable system is a promising alternative to deliver both flexibility and performance at the same time. New reconfigurable technologies and technology-dependent tools have been developed, but a system-level design methodology to support system analysis and fast design space exploration is missing. In this paper, we present a SystemC-based system-level design approach. The main focuses are the resource estimation to support system analysis and reconfiguration modeling for fast performance simulation. The approach was applied in a real design case of a WCDMA detector on a commercially available reconfigurable platform. The runtime reconfiguration was used and the design showed 40% area saving when compared to a functionally equivalent fixed system and 30 times better in processing time when compared to a functionally equivalent pure software design.
Keywords :
code division multiple access; reconfigurable architectures; system-on-chip; SystemC; WCDMA detector; fast design space exploration; performance simulation; reconfigurable platform; reconfigurable system-on-chip; system analysis; system-level design methodology; technology-dependent tool; Analytical models; Design methodology; Detectors; Multiaccess communication; Performance analysis; Runtime; Space exploration; Space technology; System-level design; System-on-a-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Digital System Design, 2005. Proceedings. 8th Euromicro Conference on
Print_ISBN :
0-7695-2433-8
Type :
conf
DOI :
10.1109/DSD.2005.72
Filename :
1559827
Link To Document :
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