DocumentCode :
2797209
Title :
Design issues for a radiation-tolerant digital-to-analog converter in a commercial 2.0-μm BiCMOS process
Author :
Ahn, J.T. ; Holman, W.T. ; Schrimpf, R.D. ; Galloway, K.F. ; Bryant, D.A. ; Calvel, P. ; Calvet, M.-C.
Author_Institution :
Tektronix Inc., Beaverton, OR, USA
fYear :
1997
fDate :
15-19 Sep 1997
Firstpage :
120
Lastpage :
125
Abstract :
This paper introduces a methodology for using standard commercial processes to design analog integrated circuits that can tolerate the adverse effects of ionizing radiation. First, several devices of various types and sizes were exposed to ionizing radiation and characterized under worst-case biasing conditions with dose rates and maximum total doses as stipulated in circuit specifications. Second, a determination was made as to what types of devices and circuit topologies were best suited for a desired application, given worst-case component parameters. Finally, taking into account the circuit specifications and the expected shifts in device performance, the circuit was designed, simulated, fabricated, and tested. This paper focuses on the design example of a radiation-tolerant 6-bit R-2R ladder digital-to-analog converter (DAC) in a commercial 2.0-μm BiCMOS process
Keywords :
BiCMOS integrated circuits; digital-analogue conversion; integrated circuit design; ladder networks; radiation hardening (electronics); 2.0 micron; 6 bit; BiCMOS process; analog integrated circuit; design; ionizing radiation; ladder digital-to-analog converter; radiation tolerance; Analog circuits; Analog integrated circuits; BiCMOS integrated circuits; Circuit testing; Circuit topology; Digital-analog conversion; Fabrication; Ionizing radiation; MOSFETs; Process design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radiation and Its Effects on Components and Systems, 1997. RADECS 97. Fourth European Conference on
Conference_Location :
Cannes
Print_ISBN :
0-7803-4071-X
Type :
conf
DOI :
10.1109/RADECS.1997.698866
Filename :
698866
Link To Document :
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