VLSI implementation of an OFB processor for encryption of real-time data

Author

Kim, Young-Chul ; Kim, Kwang-Ok ; Lee, Tae-Won

Author_Institution

Dept. of Electr. Eng., Chonnam Nat. Univ., Kwangju, South Korea

fYear

2000

fDate

2000

Firstpage

179

Lastpage

182

Abstract

In this paper, the OFB processor, which encrypts real-time data (stream type) on a noisy channel such as satellite communication, is implemented. We design four main blocks, which are Key Interface block, DES block of two-round method, Shift Reg block and Sel discard block necessary for implementation of the OFB processor. These blocks are modeled in VHDL and verified by simulation and synthesis. The proposed OFB processor is designed in full-custom by 0.6 mm Hyun Dai fabrication using the IDEC-C631 library

Keywords

VLSI; circuit feedback; cryptography; digital signal processing chips; hardware description languages; satellite communication; DES block; Hyun Dai fabrication; IDEC-C631 library; Key Interface block; OFB processor; Sel discard block; Shift Reg block; VHDL; VLSI implementation; noisy channel; output feedback block; real-time data encryption; satellite communication; two-round method; Circuit noise; Circuit testing; Computational modeling; Cryptography; Fabrication; Network synthesis; Process design; Satellite communication; Shift registers; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

ASICs, 2000. AP-ASIC 2000. Proceedings of the Second IEEE Asia Pacific Conference on

Conference_Location

Cheju

Print_ISBN

0-7803-6470-8

Type

conf

DOI

10.1109/APASIC.2000.896938

Filename

896938