iSAVE: a behavioral emulator for in-system algorithm verification

Author

Lee, Seungjong ; Jung, Moo-Kyung ; Park, In-Cheol ; Kyung, Chong-Min

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Taejon, South Korea

fYear

2000

fDate

2000

Firstpage

303

Lastpage

306

Abstract

This paper presents a behavioral emulation system called iSAVE (in-System Algorithm Verification), which performs in-system verification of the behavioral description in C of a chip in the context of its application board at the early design stage. We were able to significantly increase the emulation speed by modeling the interface of the target chip with both the software part, which runs as thread, and the hardware part, mapped into FPGA logic. The proposed idea is validated by demonstrating the behavioral emulation of MP3 decoder chip, as obtained from the public domain MP3 program

Keywords

VLSI; application specific integrated circuits; development systems; field programmable gate arrays; formal verification; integrated circuit design; logic CAD; FPGA logic; MP3 decoder chip; application board; behavioral emulator; emulation speed; iSAVE; in-system algorithm verification; Algorithm design and analysis; Application software; Context modeling; Emulation; Field programmable gate arrays; Hardware design languages; Microprocessors; Power system modeling; Signal generators; Signal processing algorithms;

fLanguage

English

Publisher

ieee

Conference_Titel

ASICs, 2000. AP-ASIC 2000. Proceedings of the Second IEEE Asia Pacific Conference on

Conference_Location

Cheju

Print_ISBN

0-7803-6470-8

Type

conf

DOI

10.1109/APASIC.2000.896968

Filename

896968