Title :
Wafer resistivity influence over DRIE processes for TSVs manufacturing
Author :
Vasilache, Dan ; Chiste, M. ; Colpo, Sabrina ; Giacomozzi, Flavio ; Margesin, Benno
Author_Institution :
FBK-irst Trento, Trento, Italy
Abstract :
This paper presents for the first time influence of the silicon resistivity over the DRIE processes. Our aim was to develop a new process for tapered walls through silicon vias (TSVs) with a good control over the walls angle. Different wafer types were used and a dependency of resistivity was found, with an important impact over the TSVs shape. Solution found is presented and experiments performed to obtained designed TSVs.
Keywords :
elemental semiconductors; integrated circuit manufacture; silicon; sputter etching; three-dimensional integrated circuits; DRIE process; TSV manufacturing; silicon resistivity; tapered wall; through silicon vias; wafer resistivity; wafer type; Conductivity; Etching; Manufacturing; Passivation; Shape; Silicon; Substrates; DRIE; resistivity; variable isotropy process;
Conference_Titel :
Semiconductor Conference (CAS), 2012 International
Conference_Location :
Sinaia
Print_ISBN :
978-1-4673-0737-6
DOI :
10.1109/SMICND.2012.6400662
