Title :
System Level Voltage Scheduling Technique Using UML-RT Model
Author :
Neishaburi, M.H. ; Daneshtalab, Masoud ; Nabi, Majid ; Mohammadi, Simak
Author_Institution :
Univ. of Tehran, Tehran
Abstract :
In this paper, we present optimized methodology for Intra-task voltage scheduling. Our proposed method gets data flow and control flow of application that represents coloration between different parts of the application at the early stage of design using UML-RT model and decides to schedule processor´s voltage. By applying this technique on JPEG encoder system experimental results show reduction in energy consumption by 18-54 % over common Intra-DVS algorithm.
Keywords :
Unified Modeling Language; data flow computing; power aware computing; processor scheduling; IntraDVS algorithms; UML-RT model; control flow; data flow; intra-task voltage scheduling; processor scheduling; system level voltage scheduling technique; Clocks; Digital cameras; Dynamic voltage scaling; Image coding; Optimization methods; Processor scheduling; Real time systems; Transform coding; Unified modeling language; Voltage control;
Conference_Titel :
Computer Systems and Applications, 2007. AICCSA '07. IEEE/ACS International Conference on
Conference_Location :
Amman
Print_ISBN :
1-4244-1030-4
Electronic_ISBN :
1-4244-1031-2
DOI :
10.1109/AICCSA.2007.370928
