• DocumentCode
    2799175
  • Title

    Multi-cycle Test with Partial Observation on Scan-Based BIST Structure

  • Author

    Sato, Yasuo ; Yamaguchi, Hisato ; Matsuzono, Makoto ; Kajihara, Seiji

  • Author_Institution
    Dept. of Comput. Sci. & Electron., Kyushu Inst. of Technol., Iizuka, Japan
  • fYear
    2011
  • fDate
    20-23 Nov. 2011
  • Firstpage
    54
  • Lastpage
    59
  • Abstract
    Field test for reliability is usually performed with small amount of memory resource, and it requires a new technique which might be somewhat different from the conventional manufacturing tests. This paper proposes a novel technique that improves fault coverage or reduces the number of test vectors that is needed for achieving the given fault coverage on scan-based BIST structure. We evaluate a multi-cycle test method that observes the values of partial flip-flops on a chip during capture-mode. The experimental result shows that the partial observation achieves fault coverage improvement with small hardware overhead than the full observation.
  • Keywords
    built-in self test; flip-flops; integrated circuit reliability; logic testing; fault coverage; field test; memory resource; multicycle test method; partial flip-flops; partial observation; reliability test; scan-based BIST structure; test vector reduction; Built-in self-test; Circuit faults; Clocks; Flip-flops; Hardware; Logic gates; Vectors; BIST; multi-cycle test; multiple observation; partial observation; scan-based BIST;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Symposium (ATS), 2011 20th Asian
  • Conference_Location
    New Delhi
  • ISSN
    1081-7735
  • Print_ISBN
    978-1-4577-1984-4
  • Type

    conf

  • DOI
    10.1109/ATS.2011.34
  • Filename
    6114513