DocumentCode :
2799408
Title :
A statistical study of the effectiveness of BIST jitter measurement techniques
Author :
Bordoley, David ; Nguyen, Hieu ; Soma, Mani
Author_Institution :
Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
fYear :
2005
fDate :
6-10 Nov. 2005
Firstpage :
100
Lastpage :
107
Abstract :
This paper describes a statistical study of the effectiveness of state-of-the-art built-in-self-test (BIST) jitter measurement techniques. Many BIST solutions under-sample the signal under test, estimating the jitter in a system based upon a subset of the total number of clock edges. In this paper, we explore how under-sampling affects the accuracy of jitter measurements, and demonstrate a technique for estimating the actual jitter using a Gaussian distribution estimation. Our theoretical results were verified through a simulation study and comparison to experimental data collected from a 400 MHz phase-locked loop supplied by an industry sponsor.
Keywords :
Gaussian distribution; automatic testing; built-in self test; circuit testing; jitter; phase locked loops; 400 MHz; BIST jitter measurement; Gaussian distribution estimation; built-in-self-test; phase-locked loops; Built-in self-test; Clocks; Frequency measurement; Gaussian distribution; Jitter; Measurement techniques; Phase locked loops; System performance; System testing; Time measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design, 2005. ICCAD-2005. IEEE/ACM International Conference on
Print_ISBN :
0-7803-9254-X
Type :
conf
DOI :
10.1109/ICCAD.2005.1560047
Filename :
1560047
Link To Document :
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