Title :
Online Test Macro Scheduling and Assignment in MPSoC Design
Author :
Khodabandeloo, B. ; Hoseini, S.A. ; Taheri, S. ; Haghbayan, M.H. ; Babaei, M.R. ; Navabi, Z.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran
Abstract :
Due to unreliability of the cores in embedded systems in deep sub-micron technologies, a method for testing cores in the field is needed. In this paper an online method for testing cores of embedded designs is presented. The proposed task scheduling method runs the test routine ASAP periodically considering the real time constraints. A software test routine based on a proposed method will be generated and a task scheduling process including the test task (for each core) and other existing applications of the embedded system will be presented. A software based checksum is issued for online test result analysis that shortens the memory usage of the test process. Experimental results show that this method improves the test application time (TAT) and fault coverage (in proportion to TAT) as compared with the existing methods.
Keywords :
embedded systems; integrated circuit testing; scheduling; system-on-chip; MPSoC design; TAT; core testing online method; deep submicron technology; embedded system; fault coverage; online test macroassignment; online test macroscheduling; online test result analysis; software based checksum; software test routine; task scheduling method; test application time; Compaction; Embedded systems; Processor scheduling; Real time systems; Registers; Testing; Embedded design; Software based testing; Test compaction; Test macro generation;
Conference_Titel :
Test Symposium (ATS), 2011 20th Asian
Conference_Location :
New Delhi
Print_ISBN :
978-1-4577-1984-4
DOI :
10.1109/ATS.2011.95