A high fidelity ATM traffic and network simulator

The design of an ATM traffic and network (ATM-TN) simulator which characterizes cell level network behavior is presented. The simulator incorporates three classes of ATM traffic source models: an aggregate ethernet model, an MPEG model and a World Wide Webb transactions model. Six classes of ATM switch architectures are modeled including output buffered, shared memory buffered and cross bar switch models, and then multistage switches which can be built from these three basic models. The ATM-TN simulator can be used to characterize arbitrary ATM networks with dynamic multimedia traffic loads. Call set up and tear down via ATM signaling is implemented in addition to the various types of cell traffic streams generated by voice, video and data. The simulator is built on a simple, efficient simulation language called SimKit which is capable of supporting both fast sequential and parallel execution. Parallel execution is supported using WarpKit, an optimistically synchronized kernel that is aimed at shared memory multiprocessor platforms such as the Silicon Graphics Powerchallenge and Sun Spare 1000 series machines. The paper outlines general requirements for ATM traffic and network simulation, presents an ATM-TN simulator architecture, describes its major components and discusses the major issues associated with cell level ATM modeling and simulation