Identification of Defective TSVs in Pre-Bond Testing of 3D ICs

Pre-bond testing of TSVs has been identified as a major challenge for yield assurance in 3D ICs. We present a defective-TSV localization technique based on pre-bond probing of a network of TSVs. We describe an efficient algorithm for designing parallel TSV test sessions such that test time is reduced and a given number of faulty TSVs within the TSV network can be uniquely identified. Optimization results for various networks of TSVs highlight significant reduction in test time using the proposed method.