A unified modeling of NBTI and hot carrier injection for MOSFET reliability

A unified theory of negative bias temperature instability (NBTI) and hot carrier injection (HCI) induced interface trap generation is developed to simultaneously explain the time-exponents of both phenomena. Characteristic time-dependence of interface trap generation (/spl Delta/N/sub IT/ /spl sim/ t/sup n/) due to NBTI (/spl sim/t/sup 0.25/) and HCI (/spl sim/ t/sup 0.5/) degradation are shown. Our model not only agrees with the experimental exponents and provides insight into dynamic behavior of the degradation processes for planar MOSFETs, but also predicts possible reliability concerns for the future-generation of surround-gate device geometries. The unified R-D model described in this paper successfully captures, for the first time, the geometry-dependence of trap generation and unifies HCI and NBTI. Significant achievements are: (i) agreement with the experimental data; (ii) realistic lifetime projection; and (iii) predictions of higher degradation rate for future generation of surround gate devices.