DocumentCode :
2800568
Title :
Subhalf-micron gate GaAs MESFET process using phase-shifting-mask technology
Author :
Kimura, T. ; Saito, T. ; Jinbo, H. ; Ichioka, T. ; Inokuchi, K. ; Yamashita, Y. ; Sano, Y.
Author_Institution :
Oki Electr. Ind. Co. Ltd., Tokyo, Japan
fYear :
1991
fDate :
20-23 Oct. 1991
Firstpage :
281
Lastpage :
284
Abstract :
For the purpose of an ultra-high-speed GaAs LSI, the phase-shifting-mask technology has been applied to the fabrication process of subhalf-micron gate GaAs MESFETs. The lithography of gate pattern was performed by the PEL (phase-shifter edge-line) mask technique with the double exposure process using the i-line stepper, where the resist spacing was precisely controlled by the exposure dose. The gate metal of W-Al was then etched by ECR plasma with no under-cut, which resulted in fine gate patterning. GaAs MESFETs fabricated in a 3-inch wafer have shown a good uniformity of Vth as small as 40 mV, and a high gm property of 424 mS/mm with a good uniformity of gm (3.5%) at the gate length of 0.22 mu m.<>
Keywords :
III-V semiconductors; Schottky gate field effect transistors; field effect integrated circuits; gallium arsenide; integrated circuit technology; large scale integration; masks; photolithography; 0.22 micron; ECR plasma; GaAs; LSI; MESFET process; PEL; double exposure process; fabrication process; i-line stepper; lithography; mask technique; phase-shifting-mask technology; resist spacing; subhalf-micron gate; uniformity; Etching; Fabrication; Gallium arsenide; Large scale integration; Lithography; MESFETs; Phase shifters; Plasma applications; Plasma properties; Resists;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1991. Technical Digest 1991., 13th Annual
Conference_Location :
Monterey, CA, USA
Print_ISBN :
0-7803-0196-X
Type :
conf
DOI :
10.1109/GAAS.1991.172692
Filename :
172692
Link To Document :
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