• DocumentCode
    2800773
  • Title

    Numerical parallel algorithms for large-scale nanoelectronics simulations using NESSIE

  • Author

    Polizzi, E. ; Sameh, A.

  • Author_Institution
    Dept. of Comput. Sci., Purdue Univ., West Lafayette, IN, USA
  • fYear
    2004
  • fDate
    24-27 Oct. 2004
  • Firstpage
    67
  • Lastpage
    68
  • Abstract
    A new high performance parallel algorithms to enhance the numerical efficiency of the self-consistent procedure was being proposed. In NESSIE, the linear systems are currently solved on a uniprocessor using a preconditioned Krylov subspace iterative method. In order to compute the electron density, one needs to repeat this procedure for all the energy levels (of the order 103+). This can be trivially done independently on each processor of a Linux cluster using MPI directives. One advantage of this parallel procedure is that the communications between the processors are minimal. A significant drawback, however, to this simplistic solution strategy is that it may not be possible for each processor, with its limited local memory, to handle huge linear systems. For very large systems as outlined above, it is essential to adopt a strategy in which all processors of a high-end computing platform, cooperate on solving a single system. Towards the goal the following were developed and applied (i) a parallel hybrid linear solver SPIKE that represents an improvement over the classical direct solvers of ScaLAPACK, (ii) a parallel trace-minimization algorithm TRACEMIN that is superior to Lanczos, subspace iteration, and LAPACK schemes for computing the lowest eigenpairs.
  • Keywords
    iterative methods; linear systems; nanoelectronics; parallel algorithms; Krylov subspace iterative method; LAPACK schemes; Linux cluster; MPI directives; NESSIE; ScaLAPACK; eigenpairs; electron density; linear solver SPIKE; linear systems; local memory; nanoelectronics simulations; numerical parallel algorithms; parallel trace-minimization algorithm; uniprocessor; Iterative methods; Linear systems; Parallel algorithms;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computational Electronics, 2004. IWCE-10 2004. Abstracts. 10th International Workshop on
  • Conference_Location
    West Lafayette, IN, USA
  • Print_ISBN
    0-7803-8649-3
  • Type

    conf

  • DOI
    10.1109/IWCE.2004.1407326
  • Filename
    1407326