DocumentCode
280093
Title
A low cost route to EPLDs
Author
Seals, R.C.
Author_Institution
Sch. of Eng., Thames Polytech., London, UK
fYear
1990
fDate
33018
Firstpage
42430
Lastpage
42432
Abstract
For teaching the concepts of programmable logic devices to second year Electrical and Electronic Engineering degree students, access to some form of programmable logic was required. This had to be cheap, easy to program but flexible, with most of the functions of more expensive systems. That is, easy logic design, JEDEC output, test vectors and simulated operation. The solution chosen was to use Programmable Language for Programmable Logic (PLPL) coupled with the Programmable Logic Device (PLD), 22V10 and a standard PLD programmer. This gave an industry standard device and architecture with only a small outlay. The Personal Computers (PCs) and PLD programmer already existed and the software was available under the DTI ECAD initiative. The PLPL software has since been made to work on a PC network. Second year engineering students now produce working designs in 20 hours, having no previous experience of PCs, PLPL or PLDs
Keywords
PLD programming; logic arrays; student laboratory apparatus; 22V10; EPLDs; Electrical and Electronic Engineering degree students; JEDEC output; PLPL; Programmable Language for Programmable Logic; Programmable Logic Device; easy logic design; industry standard device; low cost route; simulated operation; standard PLD programmer; test vectors;
fLanguage
English
Publisher
iet
Conference_Titel
Programmable Logic Devices for Digital Systems Implementation, IEE Colloquium on
Conference_Location
London
Type
conf
Filename
190241
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