DocumentCode :
280095
Title :
Programmable logic arrays for prototype computer implementation
Author :
Williams, Ifor
Author_Institution :
Dept. of Comput. Sci., Manchester Univ., UK
fYear :
1990
fDate :
33018
Firstpage :
42491
Lastpage :
42493
Abstract :
Discusses the prototyping of MUSHROOM, a RISC processor designed to support object-oriented and symbolic processing languages such as Smalltalk-80 and Lisp respectively. In many respects, MUSHROOM resembles the mass of RISC architectures now dominating the 32-bit processor market. The ability to reconfigure nearly instantaneously is clearly a major advantage of LCA devices over UV erasable or fuse programmable devices. By loading different configuration patterns, the same hardware can, for example, be readily used to implement many different versions of the processor architecture. Although dynamic re-configuration is useful in this respect, it is less useful in correcting errors as the time required for re-placement and re-routing can be substantial. For programmable devices, the logic density and IO connectivity of LCAs are unsurpassed. However, the matrix structure and programmable interconnect can lead to widely varying signal timings depending on the routing. Consequently, great care must be taken to eliminate long paths on critical signals. In contrast, the signal timings in the PAL style of programmable devices are much easier to determine and manage
Keywords :
logic CAD; logic arrays; reduced instruction set computing; 32-bit processor; IO connectivity; LCA devices; Lisp; MUSHROOM; PLA; RISC architectures; RISC processor; Smalltalk-80; logic cell arrays; logic density; matrix structure; programmable interconnect; programmable logic arrays; prototype computer implementation; prototyping; varying signal timings;
fLanguage :
English
Publisher :
iet
Conference_Titel :
Programmable Logic Devices for Digital Systems Implementation, IEE Colloquium on
Conference_Location :
London
Type :
conf
Filename :
190243
Link To Document :
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