Title :
Dynamics of backside wafer level microprobing
Author :
Chiang, Ching-Lang ; Hurley, D.T.
Author_Institution :
Hypervision Inc., Fremont, CA, USA
fDate :
March 31 1998-April 2 1998
Abstract :
Emission microscopes have over a decade of continuous usage in inspection of semiconductors from the front surface for emission sites. The development of multilevel metallization, flip chip and lead-on-chip (LOC) package design has eliminated or restricted this inspection avenue. Inspection from the backside of semiconductors is complicated by a "silicon filter effect", in both short and long wavelengths, that is tied to the dopant concentration. Based on experience with customer devices of all types and the transmissivity calculation from published optical absorption data, we show that die thinning is a requirement for backside EM analysis. We describe a thinning and polishing technique that enables one to locally thin only the defective die, so that the mechanical integrity of the wafer is preserved to handle probing. We also explore the mechanics of deflection and stress in wafers due to probe needle load in backside wafer-level microprobing, where the wafer is supported only at the edge. We review the development of backside wafer-level microprobing and present the state-of-the-art of this technology. A close examination of the maximum allowable probe needle force leads us to the development of ultra-low-force (ULF) probe cards. We believe that the combination of our local die thinning and polishing technology, ULF probe cards, and fourth-generation emission microscopes, built upon backside wafer microprobers, provides IC failure analysts with a powerful new set of tools in years to come.
Keywords :
failure analysis; inspection; integrated circuit reliability; integrated circuit testing; integrated circuit yield; internal stresses; light absorption; optical microscopy; polishing; probes; IC failure analysis; IC thinning/polishing technique; Si; backside EM analysis; backside inspection; backside wafer level microprobing dynamics; backside wafer microprobers; backside wafer-level microprobing; defective die; deflection mechanics; die thinning; dopant concentration; emission microscopes; emission sites; flip chip; inspection; lead-on-chip package design; local die thinning/polishing technology; local thinning; maximum allowable probe needle force; multilevel metallization; optical absorption data; probe needle load; semiconductor front surface inspection; silicon filter effect; transmissivity; ultra-low-force probe cards; wafer mechanical integrity; wafer stress; wafer support; Flip chip; Inspection; Lab-on-a-chip; Metallization; Microscopy; Needles; Optical filters; Optical surface waves; Probes; Semiconductor device packaging;
Conference_Titel :
Reliability Physics Symposium Proceedings, 1998. 36th Annual. 1998 IEEE International
Conference_Location :
Reno, NV, USA
Print_ISBN :
0-7803-4400-6
DOI :
10.1109/RELPHY.1998.670465