DocumentCode
2801112
Title
A New Fast Slew Buffering Algorithm Without Input Slew Assumptions
Author
Hu, Shiyan ; Hu, Jiang
Author_Institution
Department of Electrical and Computer Engineering, Texas A&M University, College Station, Texas 77843
fYear
2007
fDate
15-16 Nov. 2007
Firstpage
1
Lastpage
4
Abstract
As VLSI technology moves to the nanoscale regime, an ultra-fast slew buffering technique to buffer large number of nets and minimize buffering cost is highly desirable. The existing method proposed in [1] is able to efficiently perform buffer insertion with a simplified assumption on buffer input slew, however, when handling more general cases without input slew assumptions, it becomes slow despite that significant amount of buffer area savings can be obtained. In this paper, a fast buffering technique is proposed to handle this difficult general problem. Instead of building solutions from scratch, the new approach performs efficient optimizations to buffering solutions obtained with the fixed input slew assumption. Experiments on industrial netlists demonstrate that our algorithm is very effective and highly efficient. Compared to the commonly-used van Ginneken style buffering, up to 49 Ã speed up is obtained and often 10% buffer area is saved. Compared to the algorithm without input slew assumption proposed in [1], up to 37 Ã speedup can be obtained with slight sacrifice in solution quality.
Keywords
Algorithm design and analysis; Application specific integrated circuits; Conductivity; Costs; Dynamic programming; Nanoscale devices; Performance gain; Timing; Upper bound; Very large scale integration; Buffer Insertion; Efficiency; Non-Fixed Input Slew; Physical Design; Slew Constraint;
fLanguage
English
Publisher
ieee
Conference_Titel
System-on-Chip, 2007. DCAS 2007. 6th IEEE Dallas Circuits and Systems Workshop on
Conference_Location
Dallas, TX, USA
Print_ISBN
978-1-4244-1680-6
Electronic_ISBN
978-1-4244-1680-6
Type
conf
DOI
10.1109/DCAS.2007.4433207
Filename
4433207
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