• DocumentCode
    2801179
  • Title

    Statistical critical path analysis considering correlations

  • Author

    Zhan, Yaping ; Strojwas, Andrzej J. ; Sharma, Mahesh ; Newmark, David

  • Author_Institution
    Dept. of ECE, Carnegie Mellon Univ., Pittsburgh, PA, USA
  • fYear
    2005
  • fDate
    6-10 Nov. 2005
  • Firstpage
    699
  • Lastpage
    704
  • Abstract
    Critical path analysis is always an important task in timing verification. For todays nanometer IC technologies, process variations have a significant impact on circuit performance. The variability can change the criticality of long paths (Gattiker et al., 2002). Therefore, statistical approaches should be incorporated in critical path analysis. In this paper, we present two novel techniques that can efficiently evaluate path criticality under statistical non-linear delay models. They are integrated into a block-based statistical timing tool with the capability of handling arbitrary correlations from manufacturing process dependence and also path sharing. Experiments on ISCAS85 benchmarks as well as industrial circuits prove both accuracy and efficiency of these techniques.
  • Keywords
    VLSI; critical path analysis; delay estimation; integrated circuit design; integrated circuit technology; nanoelectronics; network analysis; statistical analysis; block-based statistical timing tool; circuit performance; nanometer IC technology; process variations; statistical critical path analysis; statistical nonlinear delay model; timing verification; Algorithm design and analysis; Circuit optimization; Circuit testing; Design optimization; Integrated circuit interconnections; Manufacturing industries; Manufacturing processes; Propagation delay; Statistical analysis; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer-Aided Design, 2005. ICCAD-2005. IEEE/ACM International Conference on
  • Print_ISBN
    0-7803-9254-X
  • Type

    conf

  • DOI
    10.1109/ICCAD.2005.1560156
  • Filename
    1560156