DocumentCode :
2801752
Title :
A floating point convolution system
Author :
Panisset, J.F. ; Drolet, J. ; Côté, J.F. ; Larochelle, F. ; Malowany, A.S.
Author_Institution :
McGill Res. Center for Intelligent Machines, McGill Univ., Montreal, Que., Canada
fYear :
1990
fDate :
12-14 Aug 1990
Firstpage :
397
Abstract :
The design of a double precision floating point convolution processor for the VMEbus is presented. It is based on a custom VLSI systolic cell as well as off-the-shelf and programmable ASIC devices. The architecture and design of the systolic cell and of the convolver card are presented, with particular emphasis given to the DMA interface to the VMEbus and the conversion of generated results from floating point to integer format
Keywords :
VLSI; application specific integrated circuits; digital arithmetic; digital signal processing chips; systolic arrays; DMA interface; VMEbus; convolver card; custom VLSI systolic cell; floating point convolution system; programmable ASIC devices; Application specific integrated circuits; Computer architecture; Convolution; Engines; Image converters; Image processing; Kernel; Systolic arrays; Very large scale integration; Workstations;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1990., Proceedings of the 33rd Midwest Symposium on
Conference_Location :
Calgary, Alta.
Print_ISBN :
0-7803-0081-5
Type :
conf
DOI :
10.1109/MWSCAS.1990.140737
Filename :
140737
Link To Document :
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