Device modelling and design techniques for analogue SOS circuits

Silicon-on-sapphire (SOS) has become a popular technology for the implementation of digital integrated circuits for use in radiation environments. The reason for this is the complete isolation of devices by the insulating substrate, which ensures latch-up immunity under transient irradiation. An additional benefit is the very low parasitic capacitances which bestow good circuit speed. For analogue applications, the use of dielectrically isolated structures, which includes emerging silicon-on-insulator (SOI) technologies, opens up the possibility of incorporating MOS and bipolar devices on the same substrate, and offers higher design flexibility. Also, high quality polysilicon-oxide-diffusion capacitors can be made without the pn-junction parasitics found in equivalent bulk CMOS structures. The design of analogue circuits in SOS presents a number of problems, however, which have to be overcome if good analogue performance is to be achieved both in the absence of and during irradiation