Amorphous silicon barrier enhanced gate InGaAs FET

The use of In_0.53Ga_0.47As as the channel material of a FET offers several advantages. InGaAs has superior transport properties to both GaAs and InP. It can be grown lattice matched on to InP and it can be used to detect light at 1.55 μm, making it suitable for the monolithic integration of transistors and detectors for long wavelength receivers. There are however several problems associated with the fabrication of transistors on InGaAs. The most important of these is the fact that most metals have a very low Schottky barrier height of approximately 0.2 eV to InGaAs. FETS incorporating a thin layer of amorphous hydrogenated silicon to enhance the Schottky barrier height to about 1 eV have been fabricated on InGaAs. The FETs exhibit good transconductances of up to 218 mS/mm at zero gate bias and 249 mS/mm at V_gs=-0.5 V. Unfortunately the gate leakage current on these devices is high (7 mA at V_gs=-2 V) but this is thought to be due to the use of a thin amorphous silicon layer (100 Å rather than 300 Å). This approach offers the possibility of an easy method of integrating high performance FETs and MSM detectors on InGaAs