The validation of nonlinear FET modelling and circuit simulation

There are strong economic arguments for a `right first time´ design method for nonlinear GaAs FET based MMICs and MICs. With this aim the authors have successfully implemented a lookup table method of MESFET representation in conjunction with the time domain simulator ASTEC3. This has been used to model the gate and drain current generators and can also be applied to the voltage dependence of the equivalent circuit reactances. It removes inaccuracy which can occur with algebraic functional forms and allows a clearer assessment of the underlying modelling and simulation processes. It also allows alternative device types to be examined without the often difficult and time consuming development of functional forms to adequately represent each type. Circuit measurement at 100 MHz has been used to verify the accuracy of current generators based on DC characteristics. There are discrepancies between measured and simulated power saturation plots of 0.5 and 2.5 db. Since this can occur in both linear and nonlinear regions it is likely that dispersion due to surface and interface states is having an effect