Title :
Graduate Education to Fight System Level Design Productivity Gap in SOC Design
Author :
Hammami, Omar ; Cheema, Muhammad Omer
Author_Institution :
ENSTA, Paris
Abstract :
Design productivity gap in system on chip (SOC) design is the most severe challenge for continuous growth of the semiconductor industry. Considerable pressure is put on EDA research to come up with appropriate electronic system level (ESL) design methodologies in order to meet stringent time to market (TTM) constraints in this very cost sensitive industry. Multiple abstraction levels and platform based design methodologies have been the primary answers to this challenge. In this paper we describe our experience of a project oriented SOC graduate level course which combines the learning of multiple abstraction levels and platform based design to fight fixed amount of course time and time constrained learning curves to educate future engineers.
Keywords :
continuing education; electrical engineering education; high level synthesis; integrated circuit design; system-on-chip; EDA research; SOC design; electronic system level design methodology; fight system level design productivity gap; graduate education; graduate level course; multiple abstraction levels; semiconductor industry; system on chip design; time constrained learning curves; time to market constraints; Costs; Design methodology; Educational products; Electronic design automation and methodology; Electronics industry; Productivity; System-level design; System-on-a-chip; Time factors; Time to market;
Conference_Titel :
Microelectronic Systems Education, 2007. MSE '07. IEEE International Conference on
Conference_Location :
San Diego, CA
Print_ISBN :
0-7695-2849-X
DOI :
10.1109/MSE.2007.46
