Title :
Teaching Top-Down ASIC/SoC Design vs Bottom-Up Custom VLSI
Author :
Stan, Mircea ; Cabe, Adam ; Ghosh, Sudeep ; Qi, Zhenyu
Author_Institution :
Univ. of Virginia, Charlottesville
Abstract :
In the fast paced world of IC design, companies strive for ways to create competitive, robust designs, while delivering speedy time-to-market results. A top-down design flow provides a fast, results oriented design methodology, but, at most Universities, the strong legacy of the Mead/Conway approach has lead to custom methods being the default way to teach students VLSI design. This paper discusses some experiences with teaching a top-down System-on-a- Chip (SoC) design class.
Keywords :
VLSI; integrated circuit design; system-on-chip; ASIC; IC design; SoC; VLSI; Application specific integrated circuits; Costs; Design methodology; Education; Educational institutions; Electronic design automation and methodology; Field programmable gate arrays; Logic testing; Time to market; Very large scale integration;
Conference_Titel :
Microelectronic Systems Education, 2007. MSE '07. IEEE International Conference on
Conference_Location :
San Diego, CA
Print_ISBN :
0-7695-2849-X
DOI :
10.1109/MSE.2007.84