• DocumentCode
    2803687
  • Title

    Mixed-Signal Fault Equivalence: Search and Evaluation

  • Author

    Guerreiro, Nuno ; Santos, Marcelino

  • Author_Institution
    INESC-ID / Inst. Super. Tecnico (IST), Tech. Univ. of Lisbon (TUL), Lisbon, Portugal
  • fYear
    2011
  • fDate
    20-23 Nov. 2011
  • Firstpage
    377
  • Lastpage
    382
  • Abstract
    The aim of this paper is to reduce the fault simulation effort required for the evaluation of test effectiveness in mixed-signal circuits. Exhaustive simulation of basic analog and mixed-signal structures in the presence of individual faults is used to identify potentially equivalent faults. Fault equivalence is finally evaluated based on the simulation of all faults in a case study - a DCDC (switched buck converter). The number of transistor stuck-on and stuck-off faults that need to be simulated is reduced to 31% in the structures already processed by the proposed methodology. This approach is a significant contribution to make mixed-signal fault simulation possible as part of the production test preparation.
  • Keywords
    integrated circuit testing; mixed analogue-digital integrated circuits; DC-DC converter; analog structures; fault simulation; mixed-signal circuits; mixed-signal fault equivalence; test effectiveness; transistor stuck-off faults; transistor stuck-on faults; Circuit faults; Fault diagnosis; Mirrors; Neodymium; Testing; Topology; Transistors; analog; fault equivalence; fault model; mixed-signal; test;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Symposium (ATS), 2011 20th Asian
  • Conference_Location
    New Delhi
  • ISSN
    1081-7735
  • Print_ISBN
    978-1-4577-1984-4
  • Type

    conf

  • DOI
    10.1109/ATS.2011.19
  • Filename
    6114759