Title :
A Single-Configuration Method for Application-Dependent Testing of SRAM-based FPGA Interconnects
Author :
Almurib, Haider A F ; Kumar, T. Nandha ; Lombardi, Fabrizio
Author_Institution :
Dept. of Electr. & Electron. Eng., Univ. of Nottingham Malaysia Campus, Semenyih, Malaysia
Abstract :
This paper presents a new method for application-dependent testing of SRAM-based FPGA interconnects at run time. This method utilizes new features related to the function for the programming of the LUTs, the utilization (by logic activation/deactivation) of the nets in a interconnect configuration as well as the primary (unused) IOs of the FPGAs. A new LUT programming function is introduced, the proposed method retains the original interconnect configuration and modifies the function of the LUTs using the so-called 1-Bit Sum Function (1-BSF), the 1-BSF detects all possible stuck-at and bridging faults (of all cardinalities) by utilizing the all zeros´ vector and a walking-1 test set. As validated by simulation for benchmark circuits (implemented on the Xilinx Virtex4), the proposed method results in a single test configuration with 100% coverage under the assumed fault model.
Keywords :
SRAM chips; fault diagnosis; field programmable gate arrays; integrated circuit interconnections; integrated circuit testing; logic testing; 1-BSF; 1-bit sum function; LUT programming function; SRAM-based FPGA interconnection; Xilinx Virtex4 implementation; application-dependent testing; benchmark circuit; bridging fault; primary IO; single-configuration method; stuck-at fault; walking-1 test set; word length 1 bit; zero vector test set; Circuit faults; Field programmable gate arrays; Integrated circuit interconnections; Programming; Table lookup; Testing; Vectors; FPGA (Field Programmable Gate Array); fault detection; interconnect testing; run time test;
Conference_Titel :
Test Symposium (ATS), 2011 20th Asian
Conference_Location :
New Delhi
Print_ISBN :
978-1-4577-1984-4
DOI :
10.1109/ATS.2011.12
