Optimized oxygen annealing process for Vth tuning of p-MOSFET with high-k/metal gate stacks

Author

Kawanago, T. ; Lee, Y. ; Kakushima, K. ; Ahmet, P. ; Tsutsui, K. ; Nishiyama, A. ; Sugii, N. ; Natori, K. ; Hattori, T. ; Iwai, H.

Author_Institution

Frontier Res. Center, Tokyo Inst. of Technol., Yokohama, Japan

fYear

2010

fDate

14-16 Sept. 2010

Firstpage

301

Lastpage

304

Abstract

A demonstration of V_FB/V_th tuning has been conducted by optimized annealing in oxygen ambient for direct contact of high-k with Si gate stacks. The amount of oxygen atoms has been controlled by optimized annealing temperature and the thickness of the gate electrode. The shift in V_FB has been confirmed irrespective of gate dielectric materials and the thickness. The V_th of pMOSFET can be controlled to positive direction by 520 mV without any EOT penalty. Once a shift in V_FB/V_th is obtained, the values are found to be stable even after following forming gas annealing.

Keywords

MOSFET; annealing; elemental semiconductors; silicon; tuning; EOT penalty; V_FB tuning; V_th tuning; direct contact; forming gas annealing; gate dielectric materials; gate electrode; high-k/metal gate stacks; optimized annealing temperature; optimized oxygen annealing process; oxygen ambient; oxygen atoms; p-MOSFET; silicon gate stacks; Annealing; Capacitance-voltage characteristics; Electrodes; High K dielectric materials; Logic gates; MOSFET circuits; Metals;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Device Research Conference (ESSDERC), 2010 Proceedings of the European

Conference_Location

Sevilla

ISSN

1930-8876

Print_ISBN

978-1-4244-6658-0

Type

conf

DOI

10.1109/ESSDERC.2010.5618352

Filename

5618352