Investigation of a dual channel N/P-LDMOS and application to LDO linear voltage regulation

A simulation analysis of a configurable dual channel n/p LDMOS is presented. The n, p and combined n/p channel regimes are analyzed, showing the transistors potential for enhanced saturation current density without high-temperature Safe Operating Area (SOA) degradation. Possible circuit applications are proposed. In particular, it is shown that the device is a good candidate for implementation in Low-Dropout (LDO) voltage regulators, in which it allows reducing the need for a charge pump circuit, and thus increasing performances in terms of power consumption, noise and Electromagnetic Interferences (EMI).