Empirical Study about Using aiT Tool in WCET Estimation

Author

Starke, Renan A. ; de Oliveira, Romulo S.

Author_Institution

Dept. of Autom. & Syst., Fed. Univ. of Santa Catarina, Florianopolis, Brazil

fYear

2011

fDate

7-11 Nov. 2011

Firstpage

86

Lastpage

89

Abstract

The determination of upper bounds of execution time (Worst-Case Execution Time -- WCET) of tasks is an importantstep in the development and validation of safety-critical hard real-time systems. Measurement based methods arenot considered safe and the static code analysis is know to be a difficult problem if the underling processorarchitecture uses cache memories, pipelines and speculative components. This article presents an empiric study ofthe aiT WCET tool, considered one of the best. There is a tool description, its methods and some analyzed testcode for the ARM7 processor.

Keywords

cache storage; multiprocessing systems; pipeline processing; program diagnostics; program testing; reduced instruction set computing; safety-critical software; ARM7 processor; EMPIRICAL STUDY; WCET estimation; aiT WCET tool; cache memories; pipelines; processor architecture; safety-critical hard real-time system development; safety-critical hard real-time system validation; speculative components; static code analysis; worst-case execution time; Arrays; Ash; Clocks; Pipelines; Real time systems; Visualization; ARM7; Worst-Case Execution Time -- WCET; aiT;

fLanguage

English

Publisher

ieee

Conference_Titel

Computing System Engineering (SBESC), 2011 Brazilian Symposium on

Conference_Location

Florianopolis

Print_ISBN

978-1-4673-0427-6

Type

conf

DOI

10.1109/SBESC.2011.42

Filename

6114835