DocumentCode :
2805214
Title :
Bridging Behavioral and Register-Transfer Synthesis
Author :
Bhattacharya, Subhrajit ; Brglez, Franc
Author_Institution :
Department of Computer Science, Duke University/MCNC
fYear :
1992
fDate :
1-3 Mar 1992
Firstpage :
130
Lastpage :
136
Keywords :
Automatic control; Automatic generation control; Benchmark testing; Computer science; Delay; Hardware; Logic; Performance evaluation; Processor scheduling; Resource management;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
System Theory, 1992. Proceedings. SSST/CSA 92. The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design
ISSN :
0094-2898
Print_ISBN :
0-8186-2665-8
Type :
conf
DOI :
10.1109/SSST.1992.712208
Filename :
712208
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2805214
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