DocumentCode
2805597
Title
COLK cell : A new embedded DRAM architecture for advanced CMOS nodes
Author
Crémer, S. ; Goducheau, O. ; Petiton, H. ; Gaillard, S. ; Yesilada, E. ; Vernet, M. ; Jenny, C. ; Lalanne, F.
Author_Institution
STMicroelectronics, Crolles, France
fYear
2010
fDate
14-16 Sept. 2010
Firstpage
158
Lastpage
161
Abstract
This paper deals with a new and low cost embedded DRAM (eDRAM) architecture. COLK (Capacitor Over Low K) cell with capacitor placed in the first and thick SiO2 dielectric has been successfully integrated. 4Mb eDRAM testchip using this new architecture is functional in 45 nm node and presents good yield. Moreover we succeed to demonstrate the capability to continue downscaling of eDRAM for nodes down to 32 nm and 22nm.
Keywords
CMOS memory circuits; DRAM chips; capacitors; low-k dielectric thin films; silicon compounds; CMOS nodes; COLK cell; SiO2; capacitor over low k cell; eDRAM testchip; low cost embedded DRAM architecture; memory size 4 MByte; size 22 nm; size 32 nm; size 45 nm; Capacitance; Capacitors; Computer architecture; Metals; Microprocessors; Random access memory; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Device Research Conference (ESSDERC), 2010 Proceedings of the European
Conference_Location
Sevilla
ISSN
1930-8876
Print_ISBN
978-1-4244-6658-0
Type
conf
DOI
10.1109/ESSDERC.2010.5618417
Filename
5618417
Link To Document