Title :
Performance Analysis of LDPC Coded DMT Systems with Bit-loading Algorithms for Powerline Channel
Author :
Kim, Kyong-Hoe ; Kim, Seong-Cheol
Author_Institution :
Seoul Nat. Univ., Seoul
Abstract :
This paper deals with two different approaches to overcome unfavorable channel characteristics and to obtain higher performance of PLC systems: Low density parity check (LDPC) coding and bit-loading algorithms for discrete multitone (DMT) modulation. We analyze the performance of LDPC coded DMT systems with bit-loading algorithms in terms of bit-error rate and data rate. Simulations are performed with statistically modeled in-home PLC channel and noise. Several bit-loading scenarios and LDPC coding schemes are also considered. The performances of the proposed DMT systems with and without LDPC codes are analyzed for the broadband PLC system design.
Keywords :
carrier transmission on power lines; parity check codes; bit-error rate; bit-loading algorithms; low density parity check coding; powerline channel; Algorithm design and analysis; Bit error rate; DSL; Data communication; Error correction codes; OFDM modulation; Parity check codes; Performance analysis; Power system modeling; Programmable control; Bit-loading; DMT; LDPC; PLC;
Conference_Titel :
Power Line Communications and Its Applications, 2007. ISPLC '07. IEEE International Symposium on
Conference_Location :
Pisa
Print_ISBN :
1-4244-1090-8
Electronic_ISBN :
1-4244-1090-8
DOI :
10.1109/ISPLC.2007.371129