A fast evaluation of power delivery system input impedance of printed circuit boards with decoupling capacitors

Author

Zhao, Jin ; Mandhana, Om P.

Author_Institution

Sigrity Inc., Santa Clara, CA, USA

fYear

2004

fDate

25-27 Oct. 2004

Firstpage

111

Lastpage

114

Abstract

A fast power delivery system input impedance evaluation methodology for printed circuit board decoupling capacitor placement study is presented in This work. The methodology is based on electrical network admittance matrix properties. The admittance matrix methodology described in This work is rigorously validated by comparing the decoupling capacitor placement evaluation of a real printed circuit board by both impedance matrix and results from commercial electromagnetic field software.

Keywords

electric admittance; electromagnetic fields; impedance matrix; power capacitors; power supply circuits; printed circuits; admittance matrix methodology; admittance matrix property; decoupling capacitor placement evaluation; electrical network; electromagnetic field software; impedance matrix; input impedance evaluation methodology; power delivery system; printed circuit boards; Admittance; Capacitors; Circuit simulation; Electromagnetic fields; Impedance; Integrated circuit noise; Integrated circuit packaging; Printed circuits; Transmission line matrix methods; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical Performance of Electronic Packaging, 2004. IEEE 13th Topical Meeting on

Print_ISBN

0-7803-8667-1

Type

conf

DOI

10.1109/EPEP.2004.1407560

Filename

1407560