DocumentCode
2806886
Title
Single event latchup protection of integrated circuits
Author
Layton, P.J. ; Czajkowski, D.R. ; Marshall, J.C. ; Anthony, H.F.D. ; Boss, R.W.
Author_Institution
Space Electron. Inc., San Diego, CA, USA
fYear
1997
fDate
15-19 Sep 1997
Firstpage
327
Lastpage
331
Abstract
This paper will report the test results from the development of the single event latchup protection circuitry (referred to as Space Electronics Inc.´s (SEIs) Latchup Protection Technology (LPTTM)) for several integrated circuits which are known to latchup at unacceptably low LET energies for space applications. Two devices were evaluated with LPTTM; the ADS7805 16 bit analog to digital converter and the GF10009 FPGA (Gatefield´s 9000 gate flash programmable gate array)
Keywords
analogue-digital conversion; field programmable gate arrays; protection; radiation hardening (electronics); space vehicle electronics; 16 bit; ADS7805 analog to digital converter; GF10009 FPGA; Gatefield flash programmable gate array; LET energy; SEI LPT; integrated circuit; single event latchup protection; space electronics; Aerospace electronics; CMOS technology; Circuit testing; Current supplies; Electronic equipment testing; Integrated circuit technology; Protection; Satellites; Space technology; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Radiation and Its Effects on Components and Systems, 1997. RADECS 97. Fourth European Conference on
Conference_Location
Cannes
Print_ISBN
0-7803-4071-X
Type
conf
DOI
10.1109/RADECS.1997.698919
Filename
698919
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