Mixed-mode simulation of oversampled sigma-delta A-D converters

The performance of conventional A-D converters is limited by the precision of the analogue components involved, and by second order effects in device characteristics. The circuit-level simulation of A-D converters requires unreasonable CPU time. Most of the computational effort is wasted by the need to model the entire circuit at the device level, including logic devices. The simulation of oversampled sigma-delta converters presents further problems. As their performance is quantified by the signal to noise ratio at the output, large amounts of time point data are needed. Until now, it has therefore only been possible to simulate sigma-delta converters by means of a completely functional description. The circuit-level non-idealities must be modelled in this description. It would be better to simulate the analogue parts of the circuit at a circuit-level, leaving the digital parts to be simulated rapidly at the logic-level. This paper describes how a mixed-mode simulator has been used to analyse the behaviour of a switched capacitor sigma-delta converter