2808966

Parallel Microprocessor Architecture as Building Block Module for Implementation of Static Connected MIMDs: Architectural Design of Building Block Module

Kahveci, T.M. ; Martin, Harold L.

North Carolina A&T State University

1992

1-3 Mar 1992

324

328

Chip scale packaging; Clocks; Computer aided instruction; Computer architecture; Microprocessors; Pipelines; Reduced instruction set computing; Registers; Topology; Very large scale integration;

English

ieee

System Theory, 1992. Proceedings. SSST/CSA 92. The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design

0094-2898

0-8186-2665-8

conf

10.1109/SSST.1992.712293

712293