Hot-carrier degradation mechanism and promising device design of nMOSFETs with nitride sidewall spacer

Author

Sambonsugi, Yasuhiro ; Sugii, Toshihiro

Author_Institution

Fujitsu Labs. Ltd., Atsugi, Japan

fYear

1998

fDate

March 31 1998-April 2 1998

Firstpage

184

Lastpage

188

Abstract

We investigated the HC reliability of deep submicron LDD nMOSFETs with nitride sidewalls, and found a unique stress bias dependence of HC degradation under lower stress bias conditions. This means lifetime estimations are inconclusive because of deviations from the empirical law. Moreover, we succeeded in improving HC reliability in nitride sidewall devices by shifting the location of the HC injection.

Keywords

MOSFET; dielectric thin films; hot carriers; semiconductor device reliability; semiconductor device testing; HC injection location; HC reliability; LDD nMOSFETs; Si/sub 3/N/sub 4/; device design; hot carrier injection location; hot carrier reliability; hot-carrier degradation mechanism; lifetime estimations; nMOSFETs; nitride sidewall devices; nitride sidewall spacer; nitride sidewalls; stress bias conditions; stress bias dependence; Degradation; Electron traps; Hot carriers; Laboratories; Life estimation; Lifetime estimation; Logic devices; MOSFETs; Random access memory; Stress;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium Proceedings, 1998. 36th Annual. 1998 IEEE International

Conference_Location

Reno, NV, USA

Print_ISBN

0-7803-4400-6

Type

conf

DOI

10.1109/RELPHY.1998.670531

Filename

670531