Title :
Design Considerations for Sub-mW RF CMOS Low-Noise Amplifiers
Author :
Ho, Derek ; Mirabbasi, Shahriar
Author_Institution :
British Columbia Univ., Vancouver
Abstract :
Design considerations for sub-mW fully integrated narrow-band RF CMOS low-noise amplifiers (LNAs) are presented. The impacts of device-level properties and biasing on gain, noise, linearity, and power consumption of an LNA are discussed. Based on the design trade-offs discussed in the paper, a cascode LNA is designed and simulated in a standard 90 nm CMOS process to operate in the 2.4 GHz band. The LNA achieves a voltage gain of 22.7 dB, NF of 2.8 dB, IIP3 of +5.14 dBm, and PldB of -10 dBm, while consuming 943 muW from a 1 V supply.
Keywords :
CMOS integrated circuits; UHF amplifiers; low noise amplifiers; power consumption; RF CMOS low-noise amplifiers; bandwidth 2.4 GHz; cascode LNA; gain 22.7 dB; narrow-band low-noise amplifiers; noise figure 2.8 dB; power 943 muW; power consumption; size 90 nm; sub-mW low-noise amplifiers; voltage 1 V; Circuit topology; Current density; Linearity; Low-noise amplifiers; MOSFET circuits; Narrowband; Noise measurement; Radio frequency; Voltage; Wireless sensor networks;
Conference_Titel :
Electrical and Computer Engineering, 2007. CCECE 2007. Canadian Conference on
Conference_Location :
Vancouver, BC
Print_ISBN :
1-4244-1020-7
Electronic_ISBN :
0840-7789
DOI :
10.1109/CCECE.2007.100