Digital Emulation of Analogue CNN System on FPGA

In an analogue cellular neural networks system, the accuracy of the template and data values will always suffer from various kinds of errors that make analogue CNN chip respond in the erroneous fashion as simulator. How to obtain robust template parameters efficiently in order to guarantee reliable operation is an important issue for the design of analogue CNN circuits. This paper starts from the assumption that digital DT-CNN emulation implemented on FPGA can be used to bridge the implementation gap between CNN system description and analogue realization. In this paper, a digital emulation methodology is described in detail for quickly obtaining the robust templates for analogue CNN system performing the specific operation. And the erroneous analogue CNN chip is simulated by digital DT-CNN implementation on FPGA with network-on-chip approach. The simulation results show that 290 robust templates are generated from 14641 test templates by using this digital emulation methodology and those robust templates can guarantee the correct specific operation with truncating the internal data from full-precision 21 bits (L_max) to 7 bits (L_min).