• DocumentCode
    2810071
  • Title

    An advanced associative comparator integrated circuit

  • Author

    Inkol, R.J. ; Kunkel, C. ; Robotham, R.

  • Author_Institution
    DREO, Nat. Defence, Ottawa, Ont., Canada
  • fYear
    1990
  • fDate
    12-14 Aug 1990
  • Firstpage
    641
  • Abstract
    An area-efficient high-performance associative comparator has been developed using standard and custom cells. Although a conservative fabrication technology was used, the throughput of the programmable window comparator (PWC) array exceeds the equivalent of 3×109 8-bit arithmetic operations/second. The architecture can be directly scaled to implement larger associative comparators and significant performance improvements are achievable with advanced CMOS or BICMOS fabrication technologies
  • Keywords
    CMOS integrated circuits; VLSI; computerised pattern recognition; computerised signal processing; digital signal processing chips; parallel architectures; BICMOS; CMOS; area-efficient high-performance; associative comparator integrated circuit; custom cells; programmable window comparator; standard cells; Circuits; Impedance matching; Performance evaluation; Prototypes; Pulse generation; Pulse measurements; Radar measurements; Random access memory; Sorting; Spaceborne radar;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1990., Proceedings of the 33rd Midwest Symposium on
  • Conference_Location
    Calgary, Alta.
  • Print_ISBN
    0-7803-0081-5
  • Type

    conf

  • DOI
    10.1109/MWSCAS.1990.140800
  • Filename
    140800