A New Loadless 4-Transistor SRAM Cell with a 0.18 µm CMOS Technology

This paper introduces a new four transistor (4T) SRAM cell for very high density embedded SRAM applications. Compared to a 4T cell introduced previously, the new cells have the bitlines precharged to ground rather than Vdd. The cell is new stable operating at 1.8 V. A comparative analysis of the new 4T cell with other 4T loadless SRAM cells and conventional 6T SRAM cells is performed. Using a 0.18-mum CMOS technology, this cell consumes less power with less area.