DocumentCode :
2811110
Title :
Experimental demonstration of the p-ring FS+ Trench IGBT concept: A new design for minimizing the conduction losses
Author :
Antoniou, M. ; Lophitis, N. ; Udrea, F. ; Bauer, F. ; Nistor, I. ; Bellini, M. ; Rahimo, M.
Author_Institution :
Dept. of Eng., Univ. of Cambridge, Cambridge, UK
fYear :
2015
fDate :
10-14 May 2015
Firstpage :
21
Lastpage :
24
Abstract :
A new IGBT type structure, namely the p-ring FS+ Trench IGBT, with improved performance has been demonstrated. The improvement has been achieved through the utilization of p doped buried layers (p-rings) which allows for the simultaneous increase in the n enhancement layer doping concentration above the conventional levels without compromising the device breakdown rating. This unique lateral charge compensation approach is demonstrated to be highly effective in lowering the on-state losses. The experimental results show a 20% reduction in the on-state losses for a 1.7kV device.
Keywords :
buried layers; charge compensation; insulated gate bipolar transistors; losses; IGBT type structure; conduction losses minimization design; device breakdown rating; enhancement layer doping concentration; experimental demonstration; insulated gate bipolar transistors; lateral charge compensation approach; on-state losses; p doped buried layer utilization; p-ring FS+ trench IGBT concept; performance improvement; voltage 1.7 kV; Cathodes; Doping; Electric breakdown; Insulated gate bipolar transistors; Logic gates; Performance evaluation; Switches; Insulated Gate Bipolar Transistor (IGBT); superjunction power MOSFET; technology trade-off;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Semiconductor Devices & IC's (ISPSD), 2015 IEEE 27th International Symposium on
Conference_Location :
Hong Kong
ISSN :
1943-653X
Print_ISBN :
978-1-4799-6259-4
Type :
conf
DOI :
10.1109/ISPSD.2015.7123379
Filename :
7123379
Link To Document :
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