• DocumentCode
    2811882
  • Title

    Memory yield and complexity of built-in self-repair

  • Author

    Wang, Xiaopeng ; Mehler, Joel N. ; Meyer, Fred J. ; Park, Nohpill

  • Author_Institution
    ASIC Dept., IBM Corp., Essex Junction, VT, USA
  • fYear
    2005
  • fDate
    Jan. 24-27, 2005
  • Firstpage
    238
  • Lastpage
    244
  • Keywords
    VLSI; built-in self test; digital storage; embedded systems; greedy algorithms; BISR algorithm; Single Deferral algorithm; VLSI; built-in self-repair; defect tolerance; greedy algorithm; memory complexity; memory yield; repair probability; spare rows; standard heuristic algorithm; very large scale integration; Automatic testing; Built-in self-test; Decoding; Greedy algorithms; Heuristic algorithms; Integrated circuit yield; Iterative algorithms; Logic arrays; Logic programming; Random access memory;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reliability and Maintainability Symposium, 2005. Proceedings. Annual
  • ISSN
    0149-144X
  • Print_ISBN
    0-7803-8824-0
  • Type

    conf

  • DOI
    10.1109/RAMS.2005.1408368
  • Filename
    1408368