A capacitive-loaded level shift circuit for improving the noise immunity of high voltage gate drive IC

Author

Yunwu Zhang ; Jing Zhu ; Weifeng Sun ; Yangyang Lu ; Lihui Gu ; Sen Zhang ; Wei Su

Author_Institution

Nat. ASIC Syst. Eng. Res. Center, Southeast Univ., Nanjing, China

fYear

2015

fDate

10-14 May 2015

Firstpage

173

Lastpage

176

Abstract

A high voltage gate drive IC achieving the high dV_S/dt noise immunity up to 85V/ns and the allowable negative V_S swing to -12V at 15V supply voltage is proposed for the first time. The robust features are due to the presented capacitive loaded level shift circuit used in the gate driver. Measured and simulated results are performed to verify the electrical characteristics of the designed gate driver which is implemented in a 0.5um 600V Bipolar-CMOS-DMOS (BCD) technology.

Keywords

CMOS integrated circuits; bipolar integrated circuits; driver circuits; bipolar-CMOS-DMOS technology; capacitive-loaded level shift circuit; electrical characteristics; gate driver; high voltage gate drive IC; noise immunity; size 0.5 mum; voltage -12 V; voltage 15 V; voltage 600 V; Capacitors; Delays; Integrated circuit reliability; Integrated circuits; Logic gates; Noise; Voltage control; gate driver; high voltage; level shifter; noise immunity;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Semiconductor Devices & IC's (ISPSD), 2015 IEEE 27th International Symposium on

Conference_Location

Hong Kong

ISSN

1943-653X

Print_ISBN

978-1-4799-6259-4

Type

conf

DOI

10.1109/ISPSD.2015.7123417

Filename

7123417